The invention relates to a telecommunication device including a clock generation unit, more particularly for a mobile radio system, having an input for a reference clock, including an electrical circuit arrangement which has a phase-locked loop for converting the reference clock into a working clock. The invention also relates to a clock generation unit as such. Clock generation units are usually inserted in communication devices for mobile radio systems, for example in mobiles, to provide a number of working clocks based on a reference clock which the clock generation unit is supplied with. The different functional units of the mobile are driven via the working clocks. Then, in dependence on the state of operation, the different functional units are supplied with different working clocks. In order to save energy, the function units are supplied with low-frequency working clocks, for example, in the stand-by mode and, on the other hand, with a high-frequency working clock in the radio mode.
The essential component of the clock generation unit (CGU) is the so-called phase-locked loop (PLL), which provides a plurality of working clocks based on the reference clock. The individual frequencies of the working clocks then have a fixed divider ratio to the frequency of the reference clock. The operation of a programmable phase-locked loop is described, for example, in U.S. Pat. No. 5,349,544. The use of a phase-locked loop for generating working clocks in a mobile radio system is known, for example, from WO 97/21278.
For generating as uniform clock signals as possible with steepest possible rising and falling edges, the clock generation unit and the phase-locked loop are tuned to the reference clock. The reference clock is supplied by an external clock generator having a fixed reference clock frequency. The phase-locked loops known from U.S. Pat. No. 5,349,544 and WO 97/21278 are supplied with a fixed reference clock.
In mobile radio systems there are different standards which are based on different reference clocks. Essential standard mobile radio systems are, for example, the GSM system (Global System for Mobile communications), the TDMA system (Time-Division Multiple Access) and the CDMA system (Code-Division Multiple Access). These systems have in common that they are arranged as multiplex systems, more particularly as time-multiplex systems, in which a plurality of time windows are provided within a time frame determined for the respective system, while different data can be transmitted in these time windows. The time frame comprises a plurality of basic units and the basic unit clock is derived from the reference clock of the mobile radio system. The basic unit clocks of the various systems are different from each other. For the GSM system is used a reference clock of 13 Mhz, for the TDMA system a reference clock of 19.44 MHz and for the CDMA system a reference clock of 19.66 MHz.
Due to the different reference clocks, the clock generation unit is to be specifically arranged for each mobile radio system. Since the clock generation unit is generally integrated on a microchip or IC, a change-over from one system to the other is only possible via an expensive change of the layout of the chip and is thus very costly.
The present invention has for its object to provide a telecommunication device including a clock generation unit and a method of generating a working clock, which device and method can be incorporated in the various mobile radio systems.
For achieving the object as regards the clock generation unit, this clock generation unit according to the invention has an input for a reference clock, and includes an electrical circuit arrangement with a phase-locked loop for changing the reference clock into a working clock, which circuit arrangement has circuit portions provided for different reference clocks and one of the circuit portions which is assigned to a special reference clockcan be selected.
The invention thus provides to arrange the telecommunication device or clock generation unit respectively, for use in various mobile radio systems. This is achieved in that mutually alternative circuit portions are installed in the clock generation unit, which portions are arranged for the respective mobile radio system. Depending on which mobile radio system the clock generation unit is to be used for, the circuit portion assigned to this respective mobile radio system is selected. Thus a certain or various defined working clocks are selected via the respective circuit portion.
The invention is based on the consideration that it is considerably more favorable for reasons of cost to install different circuit portions inside the clock generation unit of which only one circuit portion is necessary for use in a communication device (mobile), than keeping a clock generation unit of its own for each mobile radio system. The clock generation unit including the different circuit portions is especially advantageous in that with variations of capacity or variations of demand in the individual mobile radio systems, microchips with the integrated clock generation unit can be inserted into the other mobile radio systems without much expenditure.
In a preferred embodiment the circuit portions include each a divider module integrated particularly in the phase-locked loop, with the aid of which divider module the reference clock assigned to the respective circuit portion is changed into a plurality of working clocks, while the divider module is arranged so that at least several of its working clocks that can be generated by it are substantially the same.
In this respect it is assumed that the individual components in a mobile are tuned to certain working clocks and that it is therefore very efficient to provide those working clocks for which the components are arranged, irrespective of the mobile radio system in which the mobile is to be used. This has the decisive advantage that only the clock generation unit is to be adapted to the mobile radio system and the remaining components can, in essence, further be used unchanged.
When the reference clock is selected, the divider module assigned to the reference clock is selected at the same time as part of the circuit portion specially arranged for the reference clock. The divider modules are different, in essence, as regards the adjusted divider ratios. By arranging a plurality of divider modules, it is possible that at least several of the outputs of the clock generation unit are constantly supplied with the same working clocks, irrespective of the selected reference clock.
In an alternative embodiment there is preferably provided that the phase-locked loop has fixed divider ratios irrespective of the reference clock and that the suitable working clocks are selected via a selecting element. Such a selection normally occurs by sets of register bits and connected gate logic. The circuit portions can preferably be configured, more particularly, programmed, so that the desired working clocks are generated. For this. purpose, the circuit portion is supplied with, for example, respective configuration information. Particularly a fractional divider is provided here, via which substantially any working clock can be generated from any reference clock with a fractional division ratio. Such a fractional divider is particularly used for fine-tuning the working clocks.
Advantageously, the phase-locked loop includes on the input side different sets of circuit components tuned to the reference clocks, which components can be activated alternatively while they determine particularly the locking behavior of the phase-locked loop. This is advantageous in that the phase-locked loop locks on very fast and without any disturbance when switched on, so that it already works reliably after a very brief period of time.
As an alternative, the phase-locked loop includes a special set of switching components, which is suitable for processing a plurality of reference clocks. At the frequencies 19.44 and 19.66 MHz this is preferably achieved in that the set of switching components is tuned to a medium frequency. This does away with the necessity of having to provide a plurality of sets.
Preferably, the circuit portions for providing at least a substantially uniform working clock and, more particularly, for providing five substantially same working clocks are arranged so that the components connected downstream of the clock generation unit can be driven in various operating modes i.e. with various working clocks.
The selection which working clock is used is preferably made via a selection register, which is driven for example by a processor. In the selection register are stored the working clocks suitable for the five different components for various operating modes of the mobile. This is particularly effected to reduce the energy consumption.
In a particularly preferred embodiment a basic unit clock can be selected from the working clocks available, more particularly, by a software functionality. This is advantageous in that the basic unit clock can be fixed. This opens the possibility of selecting a suitable clock as the basic unit clock.
Preferably, the selection of the special circuit portion is made before the phase-locked loop is taken into operation, so that the circuit portions tuned to the reference clock are activated already on switch-on, as a result of which the phase-locked loop rapidly and reliably starts working.
In a useful embodiment the circuit portion assigned to the special reference clock is selected already by the layout of a microchip in which the clock generation unit is integrated (IC element). This arrangement is based on the consideration that when the microchip is manufactured, first the different circuit portions are provided and that the selection is made in a late step of the process. For the selection it is generally sufficient for the semiconductor modules included in the microchip to be switched individually. This creates the possibility of designing different mobile radio systems in a late step of the process during manufacture, for example, by selection of certain masks. Compared with a completely new design this is, on the one hand, considerably more flexible during manufacture and, on the other hand, considerably more cost-effective, even when more circuit portions are provided of which only one is physically activated as a result of the special configuration in a late manufacturing step.
The selection of the circuit portion is made with the aid of a selection signal which is preferably transmitted via a hardware component, more particularly, via a connecting pin. This advantageously enables the clock generation unit, for example, prior to it being installed in a mobile, to tune to the mobile radio system for which the mobile is to be used. Since a single operation is sufficient for this, the connecting pin is available for operation of the mobile and after that for other functionality""s.
In an alternative arrangement, the selection is preferably made via a software functionality. For this purpose is provided, a register with a rewritable register entry which lays down the selected reference clock. This makes a highly simple and reversible selection possible.
Since the clock generation unit is first to be activated before it can extract the selection stored therein when the selection is made via a software functionality, it is extremely useful when the circuit arrangement of the clock generation unit is started with a separate slow reference start clock. Since the circuit portions are arranged for different reference clocks, there is a possibility that the circuit portions designed for the slow reference clocks are damaged when they are supplied with a high reference clock. Since the circuit arrangement is started with a clearly lower reference start clock, such damaging is impossible. The reference start clock is provided, for example, by a special clock generator which simultaneously drives an internal clock. It preferably provides a clock frequency in the kHz range, more particularly, a clock frequency of 32 kHz.
To avoid circuit portions being damaged, the circuit portion arranged for a high reference clock is preferably regularly selected when the phase-locked loop is taken into operation. If in the end a reference clock having a lower clock frequency is selected via the software functionality, the circuit portion arranged for the lower reference clock is changed over to when the phase-locked loop is switched on.
Advantageously, such a clock generation unit forms part of an integrated circuit which, for example, within the framework of a chip set, can be provided for assembling mobile radio systems.
For achieving the object as regards the method, according to the invention a phase-locked loop integrated with a circuit arrangement is supplied with the reference clock on the input side, and the phase-locked loop provides a working clock on the output side, while the circuit arrangement is arranged for different reference clocks and the circuit arrangement is at least tuned once to one of the reference clocks.
The essential idea here is that there is a tuning to a specific reference clock i.e. special circuit portions installed in the circuit arrangement are selected which are tuned to different reference clocks.
Further advantageous embodiments of the method may be learnt from the dependent claims. More particularly, the preferred embodiments arranged in view of the clock generation unit and special advantages can basically be transferred to the method.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiment(s) described hereinafter.